Former Graduate Students

Former Graduate Students

Ph.D. Thesis Students

Neal Alewine, Compiler-assisted Multiple Instruction Rollback Recovery using a Read Buffer, Ph.D. Thesis.

Enamuel Amyeen, Fault Equivalence and Dominance-Based Fault Diagnosis, Ph.D. Thesis.

Vamsi Boppana, State Information-Based Solutions for Sequential Circuit Diagnosis and Testing, Ph.D. Thesis.

Ming-Feng (Tom) Chang, Design, Diagnosis and Reconfiguration of Defect-tolerant VLSI, Ph.D. Thesis.

Paul Chen, Periodic Application of Concurrent Error Detection in Processor Array Architectures, Ph.D. Thesis.

Shyh-Kwei Chen, Compiler-Assisted Debugging and Multiple Instruction Retry, Ph.D. Thesis.

Ismed Hartanto, Diagnostic Test Set Evaluation and Enhancement, Ph.D. Thesis.

Kou-Rey (David) Hwang, The Design and Implementation of a Workbench for Application Specific Message-passing Parallel Reconfigurable Architectures, Ph.D. Thesis.

Ken Kubiak, Symbolic Techniques for VLSI Test and Diagnosis, Ph.D. Thesis.

Sy-Yen Kuo, Design for Yield Enhancement and Reconfiguration in Large-Area VLSI Architectures, Ph.D. Thesis.

Chung-Chi Jim Li, Compiler Assisted Rollback Recovery, Ph.D. Thesis.

Junsheng Long, Checkpoint-Based Optimistic Execution and Rollback Validation in Parallel and Distributed Systems, Ph.D. Thesis.

Antoine Mourad, Redundant Disk Arrays in Transaction Processing Systems, Ph.D. Thesis.

Nuno Ferreira Neves, Time-based Coordinated Checkpointing, Ph.D. Thesis.

Paul G. Ryan, Compressed and Dynamic Fault Dictionaries for Fault Isolation, Ph.D. Thesis.

Weiping Shi, Algorithms for Reconfiguration and Yield of VLSI, Ph.D. Thesis.

Craig B. Stunkel, TRAPEDS Address Tracing and Its Application to Multicomputer Cache Performance Analysis, Ph.D. Thesis.

Kuo-Feng Ssu, Heterogeneous and Mobile Recovery, Ph.D. Thesis.

Srikanth Venkataraman, Simulation and Deduction-Based Techniques for Fault Diagnosis, Ph.D. Thesis.

Yi-Min Wang, Space Reclamation for Uncoordinated Checkpointing in Message-Passing Systems, Ph.D. Thesis.

Kun-Lung Wu, Memory Management and Rollback Recovery in Parallel Architectures, Ph.D. Thesis.

Bin Yao, Failure Recovery in Wireless Computing Environments, Ph.D. Thesis.

M.S. Thesis Students

Md. Enamul Amyeen, Functional Fault Equivalence Using Implication and Evaluation Techniques, M.S. Thesis.

Vamsi Boppana, Fault Dictionary Compaction Using Structural and Tree-Based Techniques, M.S. Thesis.

Kevin W. Brandon, The Legobot Project and Embedded System Design, M.S. Thesis.

Mary S. Bucknell, Design of Testable Storage/Logic Arrays, M.S. Thesis.

  1. Chen, An Implementation of Local Concurrent Error Detection and Correction Using the Virtual Double-Linked List, M.S. Thesis.
  2. Cunningham, Fault Characterization and Delay Fault Testing of GaAs Logic Circuits, M.S. Thesis.

Rajeev Goel, Lego Robots: A New Educational Tool for ECE 291, M.S. Thesis.

  1. Gupta, Low Overhead Garbage Collection in a Distributed Object-Oriented System, M.S. Thesis.

Jeffrey G. Hoefer, Concurrent Structural Error Detection, M.S. Thesis.

Bob L. Janssens, Experimental Evaluation of Multiprocessor Cache-Based Error Recovery, M.S. Thesis.

Sanjeev Khanna, New Algorithms for Sequential Diagnosis, M.S. Thesis.

Doug Kovarik, Illinois Logic Animation with Waveforms, M.S. Thesis.

Steve Kovarik, Issues in Transporting Software: Modifying the Educational Computer Emulator for Multiple Systems, M.S. Thesis.

Jonathan Kua, Development and Enhancement of the Legobot Project, M.S. Thesis.

Ken Kubiak, High-Level Reliability Prediction: Implementation and Applications, M.S. Thesis.

Chung-Chi Jim Li, Local Concurrent Error Detection in Data Structures Using Virtual Backpointers, M.S. Thesis.

Matt Lowrie, Reconfigurable Tree Architectures Using Sub-Tree Oriented Fault Tolerance, M.S. Thesis.

Tom Maciukenas, Evaluation of a Design for Concurrent Error Detection and Testability in Large Storage/Logic Arrays, M.S. Thesis.

Ward Page, Workstation Based Schematic Capture and Animation for Logic Design, M.S. Thesis.

Stony Peng, Description of Parallel Reconfigurable Architectures Using the Object Oriented Design of Reliable/Reconfigurable Architectures Workbench, M.S. Thesis.

Kevin Read, Interfacing Illinois Logic Animation with the CHAMP Simulator, M.S. Thesis.

Paul G. Ryan, Evaluating Tests for Large Circuits, M.S. Thesis.

Howard V. Savin, Design for Concurrent Error Detection and Testability in Large Storage/Logic Arrays, M.S. Thesis.

Joe T. Scanlon, Design and Test of Bit-Serial Multipliers, M.S. Thesis.

Marc David Spaulding, Design for Concurrent Error Detection in Storage/Logic Arrays, M.S. Thesis.

  1. Stanton, Design of a Single Board x86 Controller, M.S. Thesis.

Elliot Stewart, Enhanced Compiler-Assisted Full Checkpointing, M.S. Thesis.

Srinivas Sunder, Diagnosis of Delay Faults in Sequential Circuits, M.S. Thesis.

Gaurav Suri, Logging, Checkpointing and Rollback for Localized Recovery in Message Passing and Distributed Shared Memory Systems, M.S. Thesis.

Ching Tai, Implementation Considerations for List Splitting, Sequential, and Compact Fault Dictionary Compression Techniques, M.S. Thesis.

Paul Tobin, A Workstation Based Educational Computer Emulator, M.S. Thesis.

  1. Eric Tsui, A Software-Based Distributed Shared Memory System, M.S. Thesis.

Tom Wernimont, Evaluation of a Reconfigurable Architecture for Adaptive Digital Beamforming Using the OODRA Workbench, M.S. Thesis.

  1. D. Windes, A Reliable Prolog Architecture, M.S. Thesis.

Kun-Lung Wu, Comparison and Diagnosis of Large Replicated Files, M.S. Thesis.